Construct · 1 fields · 1 citations

dynamic power dissipation: a standalone construct

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Digital electronics

power consumed in CMOS logic when node capacitances are charged and discharged, scaling with capacitance, supply squared and activity.

In digital electronics, dynamic power dissipation refers to power consumed in CMOS logic when node capacitances are charged and discharged, scaling with capacitance, supply squared and activity. This meaning comes from Chandrakasan (1992) in IEEE Journal of Solid-State Circuits.[1]

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Nearby constructs

capacitance4 fields · 5 citationsjingle · one word, four constructs (graded)class E amplifier1 fields · 1 citationsanchor · a standalone construct dissipation4 fields · 7 citationsjingle · one word, four constructs

References

Chandrakasan, A. P., Sheng, S., & Brodersen, R. W. (1992). Low-power CMOS digital design. IEEE Journal of Solid-State Circuits, 27(4), 473-484. https://doi.org/10.1109/4.126534

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