Where does interleaving collide?

In digital communications, interleaving permutes the order of coded symbols before transmission and restores it at the receiver, so that a burst of noise that corrupts a run of adjacent symbols on the channel is spread out into isolated errors that the error-correcting code can then fix. Ramsey's 1970 Realization of optimum interleavers worked out interleaver designs that guarantee a minimum separation between symbols that were originally neighbours. The referent is a symbol-permutation scheme for defeating burst errors, measured by its spreading depth and delay, and it is a different construct from spacing out study sessions or striping data across memory banks.[1]

Unit

The separation an interleaver guarantees between originally adjacent symbols

Recovery means

De-interleaving at the receiver restores the original order, turning a correlated burst into scattered single errors the code can correct

Measured by

Specified by interleaver depth and span and by the resulting delay and burst-error tolerance

In learning science, interleaving is a practice schedule in which problems of different kinds are mixed together rather than grouped into separate blocks of one type at a time. Rohrer and Taylor's 2007 study found that students who practised mixed mathematics problems did worse during practice but markedly better on a later test than students who practised the same problems in blocks, because mixing forces learners to choose a strategy rather than apply the same one on autopilot. The referent is the sequencing of study across topics, measured by delayed retention and transfer, and it shares only the word with a channel interleaver or a memory-access scheme.[2]

Unit

The gain in delayed test performance from mixing practice across topics

Recovery means

Not applicable

Measured by

Compared against blocked practice by delayed retention and by accuracy at selecting the right method for a problem

In computer architecture, memory interleaving distributes consecutive memory addresses across several independent banks so that successive accesses hit different banks and can proceed in parallel, raising effective bandwidth. Hennessy and Patterson's Computer architecture: A quantitative approach treats this banking as a standard way to hide memory latency and feed a fast processor. The referent is an address-mapping scheme across physical memory modules, measured by sustained bandwidth and bank conflicts, and it is distinct from the error-control interleaver of a communication channel or the mixed practice schedule of a learner.[3]

Unit

The sustained memory bandwidth gained by spreading accesses over banks

Recovery means

Not applicable

Measured by

Gauged by effective bandwidth, bank-conflict rate, and the number of banks relative to access latency